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Race-around condition occurs in a JK flip-flop when:

AJ = 1, K = 1 and clock pulse width is greater than propagation delay
BJ = 0, K = 0 with high clock
CJ = 1, K = 0 with low clock
DClock pulse width is zero

Explanation

In a level-triggered JK flip-flop, when both inputs J = 1 and K = 1, the output toggles. If clock pulse duration tp is greater than the internal propagation delay tpd, the output toggles repeatedly within a single clock pulse, causing race-around.

Submitted by: mcqstutor Team More Electrical Engineering MCQs →

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